Looking at the changes in 3G base station development

Base station interface specifications In terms of how to develop 3G base stations, 2004 proved to be a year of significant changes. The Common Public Radio Interface Organization (CPRI) and the Open Base Station Architecture Alliance (OBSAI) have proposed two standards to regulate open and standardized interfaces in base stations. The two organizations have already announced their technical specifications, and products supporting the new standards are beginning to appear. Figure 1 is an example of an open interface defined by the OBSAI standard.

Figure 1 Examples of open interfaces defined by the OBSAI standard

Figure 2 Basic digital predistortion system for linearization of broadband power amplifiers Two standards are independently initiated by different wireless infrastructure providers. Nokia, Samsung, LG and ZTE support the OBSAI standard, and Siemens, Ericsson, Northern Telecom, NEC and Huawei support the CPRI standard. But both focus on the interface between the baseband signal processing and the RF subsystem, and serve as a key area for standardization. Moreover, the goals of the two new standards are the same, that is, by creating a competitive market for base station module development, reducing development costs and product costs. But these new standards will affect the development of DSP functions in 3G base stations. For understanding how these standards will affect the integration of traditional RF products and DSPs, RF power amplifiers embedded in base stations are the key.

RF power amplifiers For base station RF power amplifiers, if not originated from the inside of wireless communication facility providers, they are usually developed by companies such as Powerwave, Andrew, and Remec. For such products, the interface must be tailored to suit the specific technical specifications of the network infrastructure provider .
In the industrial field, common standards are a means of reducing costs, and for a common digital interface, including those provided by CPRI and OBSAI, will change the supply chain, that is, "who needs to know what". This is mainly due to digital linearization and efficiency boosting functions, such as waveform shaping and digital pre-distortion (Digital Pre-DistorTIon) functions will become a key part of the integrated RF subsystem.
In the past ten years, because the power efficiency of broadband RF power amplifiers can be increased from 2 to 4% to 20%, it has brought great system cost savings. Therefore, digital predistortion technology has become an important R & D investment for many large wireless infrastructure companies. Figure 2 shows the basic digital predistortion system for broadband power amplifier linearization. But because the new interface is designed internally, digital predistortion processing will have to be transferred to RF subsystem providers and chip providers who are seeking to provide complete chipset solutions for the RF subsystem.
At present, silicon ASSP solutions for digital predistortion have appeared on the market, and they come from PMC Sierra and Intersil. But developers of large communications infrastructure companies are still adjusting their technology, so they are reluctant to adopt external solutions. Adjusting the digital predistortion algorithm usually requires a lot of debugging and is very complicated-this seems to be good for FPGA manufacturers (such as Xilinx and Altera), because as the preferred silicon solution, perhaps FPGA has already been identified as a mass product Complementary technology for major DSP functions in Figure 3 is Xilinx's application-specific modular ASMBL FPGA solution.

Figure 3 The latest modular ASMBL FPGA solution from Xilinx specific applications

Baseband Processing Solution The main area of ​​DSP functions in 3G base stations is of course WCDMA baseband processing. Although the main driving force in this area comes from growing silicon solutions, it makes software radio, which has always been promising, a reality. But the other end of the new digital interface is the radio frequency subsystem, so there is also "who needs to know what", which also changes in the supply chain. New 3GPP features such as high-speed downlink packet access (HSDPA), "smart antennas" and multiple-input multiple-output (MIMO) antenna arrays are collecting greater gains, software-based baseband implementation methods with reduced development time and field upgrade capabilities , Is becoming an important aspect of the product strategy of every communications equipment provider.
In the past few months, the release of many important products has shown that the baseband processing software-based design solution is preparing to be implemented on a dedicated ASIC, which makes the product cost more competitive and shortens the design cycle. These major releases include:
ADI's TIgerSHARC TS201 uses a full-speed "Danube" architecture with powerful despreading and correlation instructions. The latter is very important for UMTS to effectively perform random access (RACH) preamble detection and multi-path search.
Motorola's MRC6011 reconfigurable computing structure, with 24G multiply-accumulate operation computing power and special instructions for diffusion and correlation, is built using Morpho's MS1 reconfigurable DSP array processor.
PicoChip's PC102 is an array processing structure that can perform 38G MAC, and can achieve 140G CMAC for correlation operations.
TI's 720MHz TCI100 DSP: For 64-channel UMTS baseband processing, TI's 3-chip solution including the DSP is suitable (the other two devices are TCI110 transmitter ASSP and TCI120 receiver ASSP).
Intrinsity's 2.5GHz FastMATH adaptive signal processor provides flexible ASIC / FPGA performance and speeds time-to-market by adopting an easy-to-program embedded processor.
Among the above solutions, TI's solution uses a powerful DSP with ASSP devices as the core to achieve chip-level computing speed (strictly speaking, it is not a true "full software" solution).
ADI has carried out the conversion to a full software solution, using a powerful single-processor architecture, through a unique instruction set to complete the chip-level processing functions that traditional hardware can only achieve.
Motorola uses an interesting parallel array processing architecture to implement chip-level processing functions and performs symbol-level rate processing through a multiple StarCore DSP MSC8126.
PicoChip has developed a large-scale parallel architecture that implements all chip-level rate processing, symbol-level rate processing, and control operation functions by using three different kinds of highly optimized processors.
There are already products that use highly parallel processing structures. It can be predicted that in actual 3G products, the parallel processor structure scheme will be able to overcome the "traditional DSP architecture" of ever-increasing scale.
In terms of high-speed parallel, reconfigurable architecture, FPGA may eventually become another important competitor, because 90nm / 300mm product technology reduces costs and increases density-this combination of "hard" and "soft" processor technology The ability to combine with traditional FPGA "hardware" provides a powerful toolkit for meeting the challenges of baseband processing design.
In these methods, the decisive factor is not the reduction of their final product costs, but the reduction of product costs and development costs through the provision of libraries and even complete hardware and software solutions. Many large wireless infrastructure companies are shifting from traditional hardware methods to current, cost-effective software solutions, thereby providing more flexibility and responsiveness to market demands. But in this transition process, many companies are counting on the use of libraries to reduce their development costs, and focus their resources on the baseband field, where you can see the real difference from traditional fields-these traditional fields include channel evaluation and Frequency offset correction algorithm and power control and fine tuning during call establishment and call control.
So far, only picoChip has released a complete, conformance testing "software reference design" method, but it is clear that other participants, including FPGA providers, are moving in this direction. It is foreseeable that some newly emerging DSP providers will provide "standard" WCDMA baseband solutions that can be adopted by 3G product providers.
Some large product companies are researching APIs for baseband functions, thus starting competition between baseband silicon suppliers, but this will not affect higher-level NodeB software. This interface may be integrated into the newly emerging base station frame standard, making the baseband DSP another "standardized" functional module within the base station.
With the rapid development of open base stations, the opportunities and challenges for DSP chip providers and integrators are huge. Many issues in this area are being discussed in depth.

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